In recent years, computer systems (hereinafter simply referred to as “systems”) having a power-capping function for controlling power consumption so that it does not exceed a maximum allowable power value (an upper-limit value) set by users have come into widespread use. In one exemplary form of the power capping, when the power consumption exceeds its upper limit, the operating frequency of a CPU is automatically reduced or the operation mode of memory is switched to a power-saving mode to control the power used by the system so that it is smaller than or equal to the upper-limit value. In another exemplary form, when a duration during which the power consumption exceeds the upper-limit value exceeds a preset maximum allowable time (a guarantee period), the system is forcibly stopped and the power supply is shut off.
The use of the power capping function allows the power consumption to be restricted to a preset range, thus making it possible to systematically control the power consumption.
However, if control based on the power capping is randomly performed, an event that is not preferable in terms of the performance of system operation may occur.
Accordingly, among systems that perform control to reduce the operating frequency of a CPU so that the power consumption is smaller than or equal to the upper limit, one system is adapted to perform control so that the operation frequency decreases by an amount corresponding to the power consumption exceeding the upper-limit value in order to ensure that the operating frequency of the CPU does not decrease excessively.
Another system is also adapted to equally reduce the operating frequencies of all CPUs by dividing the power consumption exceeding the upper-limit value by the number of CPUs. In such a system, however, there is a possibility that the operating frequencies of all the CPUs decrease significantly when the amount of the excessive power consumption increases. Thus, the system performance may decline considerably.
Accordingly, another system is adapted to perform control to monitor loads (for example, usage rates) of components (CPU, memory, and so on) therein so that the power consumptions of the components with lower loads are reduced with higher priorities. More specifically, such a system is adapted so that the operating frequency of a CPU assigned to a component having a low load is reduced with higher priority and the operation mode of memory for a component whose usage rate is low is switched to a power-saving mode with higher priority.
Examples of the related art include Japanese Laid-open Patent Publication No. 2007-233894 and Japanese Laid-open Patent Publication No. 2009-175788.